Vivek Kumar

Due to the significant cost associated with power consumption, hardware overprovisioning is widely used to cap processor power consumption and improve the average power utilization of servers in data centers and nodes in HPC clusters. Existing solutions primarily focus on cluster-level power management, making limited use of power scheduling within multi-socket servers.

This paper introduces Fulcrum, a novel power management library for co-running parallel applications on multi-socket, multi-core servers, independent of the underlying parallel programming model. Our results show that Fulcrum improves system throughput (geometric mean) by 26.3% under low power caps and by up to 5.3% under higher power caps, with power efficiency improvements of 27.7–8.4%.

Modern multiprocessor systems, with their abundance of cores and sockets, make simultaneous execution of multiple applications essential for maximizing utilization. But performance and energy efficiency of co-executing applications are highly sensitive to thread placement, core allocation, and core/uncore frequency settings.

This paper presents Harmonizer, a dynamic resource optimization library for co-running applications that reduces energy consumption by 8.8–35% (20.5% geometric mean) and improves throughput by 4.8% (geometric mean) over the default Linux scheduler, and up to 28.6% energy savings and 15.8% higher throughput over two state-of-the-art approaches.

Task-based models simplify parallel programming using runtimes that handle scheduling and resource management. This paper presents the structure and experience of teaching Parallel Runtimes for Modern Processors (PRMP) at IIIT‑Delhi, where students implement a basic async–finish task model and gradually improve both the model and the runtime, with a qualitative and quantitative evaluation across three offerings.

Hardware overprovisioning is widely used to improve average power utilization, but a uniform power cap across sockets can hurt co-running applications with variable workloads. This paper introduces KarmaPM, a power management library based on application power-donation "karmas" that redistributes power bidirectionally across sockets, improving system throughput by 13.2% at lower power caps and 6.6% at higher caps, with improvements of 12.5% and 4.4% over state-of-the-art approaches.

Introduces Amoeba, a task-parallel implementation of a permanence-based community detection algorithm for multicore processors. It uses dynamic tasking for irregular computation and can adapt the thread count for energy efficiency, achieving a geometric mean speedup of 15.3× over its sequential version and 12.4% energy savings over a non-adaptive implementation.

Presents the structure and experience of teaching the Foundations of Parallel Programming course (FPP) at IIIT‑Delhi using a task-based model, Habanero C/C++ Library (HClib), where students start with traditional models, discover their limitations, and build runtime solutions to achieve high performance.

Proposes Cuttlefish, a programming-model-oblivious C/C++ library for energy efficiency in multicore parallel programs on Intel processors. An online profiler discovers memory access patterns from model-specific registers, and Cuttlefish combines DVFS and UFS to adapt core/uncore frequencies — achieving geometric mean energy savings of 19.4% with only 3.6% slowdown.

Presents PufferFish, an async–finish parallel programming model and work-stealing runtime for NUMA systems, coupling data-affinity hints with Hierarchical Place Trees (HPTs) in HClib. Its Hierarchical Elastic Tasks shrink to one worker or expand across workers depending on imbalance, achieving 1.5× speedup over HPT and 1.9× over random work-stealing on a 32-core NUMA AMD EPYC processor.

Proposes HetroOMP, an OpenMP accelerator model extension with a new hetro clause enabling simultaneous execution across host and accelerator devices. A proof-of-concept runtime for the TI Keystone-II MPSoC (4 ARM CPUs + 8 DSPs) achieves a 3.6× geometric mean speedup over the OpenMP accelerator model alone.

Proposes Featherlight, a programming model for speculative task parallelism satisfying the serial elision property without task cancellation checks. A classroom study shows productivity gains, and the cancellation technique achieves a 1.6× geometric mean speedup over Java Fork/Join on a 20-core machine.

Presents HiPER, a pluggable API framework atop a generalized work-stealing runtime for composing communication, accelerator, and other HPC libraries within a single process — demonstrating programmability and performance gains through unified, asynchronous scheduling.

Presents SuccessOnlyWS, a load-aware distributed work-stealing strategy in HabaneroUPC++ that overcomes failed steal attempts with a new busy-to-idle work-movement policy — up to 7% faster than the baseline on 12,288 cores of the Edison (CRAY-XC30) supercomputer.

Presents five Java annotations for asynchronous task parallelism and data-centric concurrency control, backed by an efficient work-stealing scheduler. Refactoring classes from existing multithreaded open-source projects showed reduced programming effort and up to 30% performance improvement.

Introduces AsyncSHMEM, integrating OpenSHMEM with a thread-pool-based work-stealing runtime to hide data-transfer latency, interoperate with tasks, and improve load balancing and locality. On the Titan supercomputer, AsyncSHMEM is competitive on regular workloads and significantly outperforms OpenSHMEM+OpenMP on event-driven applications.

Presents HC-K2H, a programming model and work-stealing runtime for the TI Keystone II Hawking platform (4 ARM CPUs + 8 DSPs), allowing tasks to run and synchronize seamlessly on either processor type, with excellent scaling over sequential single-ARM implementations.

Introduces Habanero-UPC++, a compiler-free PGAS library built on UPC++ and HClib using C++11 lambdas, tightly integrating intra-place and inter-place parallelism. Evaluated on two benchmarks scaled up to 6,000 cores.

Addresses dynamic work-stealing overheads dominated by stack introspection on a steal. Low-overhead return barriers cut this overhead roughly in half, improving total performance by up to 20% and the scalability of work-stealing applications.

Identifies key sources of overhead in work-stealing schedulers and presents two refinements. Our fastest design has just 15% overhead over sequential Java, versus 2.3× for fork-join and 4.1× for the prior system — encouraging further exploitation of hardware parallelism via work-stealing.

Identifies the overhead of managing work-stealing information on a victim's execution stack, and uses return barriers to reduce it — up to 58% lower overhead than our prior design on classical work-stealing benchmarks.

Proposes letting thieves extract state directly from a producer's stack frames using compiler-provided state maps, avoiding stack-allocated state objects. Discusses design and preliminary findings inside the X10 work-stealing runtime and Jikes RVM.

Describes a bidirectional power scheduling method for a multiprocessor: assigning a predefined power cap to each socket, periodically monitoring CPU utilization, determining whether a socket requires a change to its cap, and dynamically redistributing the assigned power cap bidirectionally among sockets in response.